Verilog / VHDL Freelance Projects from all over the world
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CDFG generator for VERILOG/VHDL
- Posted on : 5th March 2012
Given a RTL description of a hardware design in verilog or VHDL. I need to build a tool which can generate…CDFG generator for VERILOG/VHDL
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Face Recognition using Eigenfaces in FPGA
- Posted on : 29th October 2011
Face Recognition using Eigenfaces in FPGA HDL : Verilog Softwares: Modelsim, ALTERA Quartus II …Face Recognition using Eigenfaces in FPGA
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Fault Tolerant in Network Interface
- Posted on : 25th October 2011
To create a “checker” in a Network Interface. 1. Checker will collect 32 bits data from 8 deserialisers…Fault Tolerant in Network Interface
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